The “discovery” of electronics’ Missing Link was reported in the journal Nature in April 2008 by researchers from Hewlett Packard. The memristor is the fourth type of electronic component (resistors, capacitors and inductors being the other three). The existence of such a component had been predicted by Professor Leon Chua (Electrical Engineering and Computer Sciences Department at University of California, Berkeley) in his paper “Memristor – the missing circuit element”, published in the IEEE Transactions on Circuit Theory, September 1971. Chua, regarded as the “father of nonlinear circuit theory” mathematically hypothesised the existence of a “resistor with memory”.
Hewlett Packard Senior Fellow Stanley Williams (HP Labs in Palo Alto) led efforts which resulted in the fabrication of the memristor (albeit by ‘accident’ in the process of other nano-electronic experimentation), an event widely reported at the end of April 2008. The memristance effect is amplified at nano scale adding greatly to the requirement to understand and harness its properties in such circuit design. Almost two years to the day, HP Labs published findings that memristors could also perform logic computation. The paper “Memristive switches enable ’stateful’ logic operations via material implication” has stimulated renewed discussion about the potential of memristors (not only in context of memory chips and storage), but also in newly discovered ability to perform computation in chips where data is stored.
The disruptive nature of this technology is potentially ‘game changing’. In a decade, the von Neumann Architecture could be rendered archaic. Memristors require no power to maintain their data, storage capacity is significantly increased over that of existing ’solid state’ devices, speed is greatly improved and the potential exists to build machines that require zero boot time (state transition from Off to On akin to “switching on a light”). The processing capabilities of memristors conclude that data will “no longer need to be moved”, as the memristor can hold and process data simultaneously, significant performance gains can be made in computational processing. Constraints of Moore’s Law become “elastic” (the memristor is about 3 nanometres in comparison to circa 32 to 45 nanometres in sophisticated transistors). Memristors can represent many states; this has implications in relation to analogue computing and also in effective realisation of “components” similar to synapses. Research in neural computing and neuromorphic design will naturally benefit.
In the short to medium term, memristors (as NVRAM) will come to market in 2013/2014 in direct competition with flash memory technology. Reduced size, increased speed (10 fold improvement), increased capacity (perhaps 20GB per square centimetre) and reduced energy requirements will be key differentiators. Limitations of flash erase/write cycles (due to memory wear) are also likely to be improved by approximately ten fold.
Hybrid chips are likely to be the next evolution (memristor memory combined with traditional silicon processors). These would facilitate gains in memory and processor intensive applications such as high-end image processing.
Challenges lie ahead in manufacturing and productionisation, fully understanding and proving the properties of the (titanium dioxide) materials and assuring reliability of end product versus traditional techniques. Development of circuit design tools is also necessary to facilitate “industrialisation”. Success of NVRAM applications of memristor technology in approximately 3 years’ time could well see an acceleration of commercial investment.
The potential for memristors is only beginning to be understood. It is a disruptive technology and one of very significant promise. Understanding of the capabilities and limitations of the technology are evolving. This is very exciting as the ultimate use of memristors is unknown (and will certainly take a decade to fully develop). It could play a significant role in advancing exascale computing, ‘computer on a chip’ capabilities, as well as driving developments in neural and analogue computing.
This article first appeared on the Atos Origin CIO / CTO Blog in May 2010.
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